Module and Substrate Warpage (MSW)

September 2008
(Exact date soon to be announced.)

Manufacturing Research Center (MaRC Building), Georgia Institute of Technology
813 Ferst Drive, NW , Atlanta , Georgia 30332, U.S.A.

Visitor Travel Info | Download Agenda

Intended for Industry Only.

Dramatic growth and advances in semiconductor technology have placed stringent requirements on substrate wiring and via density. To achieve high wiring density and good assembly yield, substrate planarity and warpage must be tightly controlled. Although rigid and low-CTE substrate materials are gaining increasing attention, build-up organic substrates as well as flexible core-less substrates will continue to play an important role due to cost considerations.

The Microsystems Packaging Research Center (PRC) at Georgia Institute of Technology proposes to create an Industry-Academia collaborative consortium to address the material, processing, and warpage challenges with the next generation organic rigid and flexible substrates.

The PRC is working on several innovative comprehensive substrate approaches that include new substrate and dielectric materials and their processing, warpage prediction models, warpage measurement techniques, ECAD-MCAD integration tools, as well as guidelines for warpage reduction.

Proposed Topics

1. Design and Simulation

ECAD to MCAD – seamless analysis techniques

Trace layout and local substrate behavior

Core substrates with build-up layers – warpage prediction

Coreless substrates – warpage prediction

2. Materials and Processing

Core materials and properties

Dielectric materials – processing and properties

Multilayer fabrication on core

Multilayer fabrication without core

3. Metrology and Validation

Full-area warpage measurement metrology

Core substrate warpage measurement

Coreless substrate warpage – gravitational effects

4. Warpage Reduction and Targets

Processing conditions and warpage

Material selection and warpage

Trace layout and warpage

5. Test Vehicles and Prototype

Who Should Join?

Research directors, senior engineers and managers from semiconductor, system, energy, biotech, automotive, defense and aerospace industries are invited to attend the exploratory workshop.

Registration

Contacts

Prof. Suresh Sitaraman (suresh@me.gatech.edu)
Prof. Rao Tummala (rao.tummala@ece.gatech.edu)
Prof. Charles Ume (charles.ume@me.gatech.edu)
Dr. Russell Peak (russell.peak@marc.gatech.edu)

Agenda

Last updated: May 15, 2008

Morning Coffee (8:00 am to 8:30 am)

Welcome and Objectives (8.30 am – 9:00 am)

• Consortia and Workshop Objectives - Sitaraman
• Introduction to PRC and its programs - Tummala

SESSION 1 (9:00 am – 10:45 am)
Industry Session: Strategic Needs and Challenges

• Substrate Trends and Roadmap
• Emerging Substrate Technologies
• Industry Segments and Substrate Needs
• Semiconductor industry Perspective
• Substrate Supplier Perspective

Coffee Break (10:45 am – 11:00 am)

SESSION 2 (11:00 AM – 12.30 PM)

Current and Proposed Research

• Design and Simulation – Sitaraman & Peak
• Materials and Processing - Tummala
• Metrology and Validation - Ume

LUNCH and Facility Tour (12:30 pm – 2:00 pm)
Tour: PRC Facilities at Georgia Tech

SESSION 2 Continued (2:00 pm – 3:00 pm)

• Warpage Reduction and Targets - Sitaraman & Tummala
• Test Vehicles and Prototypes - All

SESSION 3 (3:00 – 4:00 pm)

Consortium Development

• Program Schedule –Tummala
• IP Management – Sutter

SESSION 4 (4:00pm – 4:30 pm)
Industry Feedback and Wrap-up – Sitaraman & Tummala