Ritwik Chatterjee
Associate Director of Silicon Systems Research

The PRC welcomes Dr. Ritwik Chatterjee who joins the Center to become the Program Director for the PRC’s new industry-academia consortium on 3D All Silicon system Module (3DASSM).

Dr. Chatterjee earned his B.S. in Electrical Engineering from Purdue University at West Lafayette, IN and his M.S. and Ph.D. in Electrical Engineering from the Massachusetts Institute of Technology in Cambridge, MA. His M.S. research was in the area of linearity of power AlGaAs/GaAs heterojunction bipolar transistors and his doctoral research was on the use of unsaturated fluorocarbons for dielectric etch applications. He was a MIT Martin Fellow of Environmental Sustainability and an AMD/SRC Fellow. After completing graduate school, he joined Freescale Semiconductor in Austin, TX in 2002 as an integration engineer. His current projects include advanced BEOL module development and 3D interconnect integration. Dr. Chatterjee has authored or co-authored 25 publications and has 7 patents pending.

Andy Seo
Software Research Engineer

Andy Seo, PhD, is currently a Research Engineer at the Packaging Research Center at Georgia Tech. Prior to joining Georgia Tech, he was a Senior CAD Software Engineer at Jacket Micro Devices, a company specializing in integrated passive devices and modules for wireless applications with Multi-Layer Organic packaging. He was working on RF Design Automation, Design for Manufacturing analysis and Process Control Monitoring.

His research interests include computer architecture, low-power and high-performance System-on-a-chip, -board and -package design, and physical CAD algorithm/tool design. He has 14 publications in journals and conferences in the areas of Physical CAD algorithm and RF design.

Dr. Andy Seo received his BSEE degree in Electronics Engineering from SungKyunKwan University, Seoul, South Korea in 1997. He completed his M.S. and Ph.D. in Electrical and Computer Engineering at Georgia Tech in 2001 and 2004, respectively.

Pradeep Dixit
Post-doctoral Research Fellow

Pradeep Dixit received Master of Technology (M.Tech.) degree in Mechanical Engineering from Indian Institute of Technology (IIT), Bombay in 2003, and Ph.D degree from Nanyang Technological University, Singapore in 2008. His Ph.D. research thesis is focused on development of through-silicon via (TSV) electroplated copper interconnects and 3D wafer stacking technology. He had also worked in the area of carbon nanotubes (CNT) based technology for advanced interconnects and thermal management applications.

At present, he is postdoctoral research fellow under the supervision of Prof. Rao Tummala in the Microsystems Packaging research center, Georgia Institute of Technology. He is leading member of low cost TSV thrust module in System-on-package (SOP) research project. His research interests lie in advanced electronic packaging techniques, silicon fabrication processes including deep reactive ion etching (DRIE), electroplating, etc.

Pradeep Dixit is the recipient of 2006 Norman Hackerman Young Author award, presented by Journal of the Electrochemical Society in the category of Solid State Science & Technology. He is author of more than 25 peer reviewed journal and conference papers. He is also member of Electrochemical Society and American Society of Mechanical Engineering.

Nitesh Kumbhat
Research Engineer

Nitesh Kumbhat received his B. Tech. (1999-2003) degree in Metallurgical and Materials Engineering from Indian Institute of Technology Roorkee and MS (2003-2005) degree in Materials Science and Engineering from Georgia Institute of Technology Atlanta with a specialization in microelectronics packaging.

He had worked for Intel India from 2005-2007 as Package Technology Development Engineer working on cutting-edge flip-chip mobile chipset package technology development. He joined Packaging Research Center at Georgia Tech as a Research Engineer in January 2008. He has experience with substrate fabrication, flip-chip assembly and reliability analysis. He has several publications in journals, conferences and magazines. His current interests include flip-chip assembly, reliability and failure analysis.